US7834634B2 - Low-power switch state detection circuit and method and mobile telephone incorporating the same - Google Patents

Low-power switch state detection circuit and method and mobile telephone incorporating the same Download PDF

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Publication number
US7834634B2
US7834634B2 US11/123,569 US12356905A US7834634B2 US 7834634 B2 US7834634 B2 US 7834634B2 US 12356905 A US12356905 A US 12356905A US 7834634 B2 US7834634 B2 US 7834634B2
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switch
node
circuit
recited
detection circuit
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US20060255812A1 (en
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David G. Martin
Richard Verney
Robert W. Walden
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Avago Technologies International Sales Pte Ltd
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Agere Systems LLC
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H9/00Details of switching devices, not covered by groups H01H1/00 - H01H7/00
    • H01H9/16Indicators for switching condition, e.g. "on" or "off"
    • H01H9/167Circuits for remote indication
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/18Modifications for indicating state of switch

Definitions

  • the present invention relates to a detection circuit, and particularly but not exclusively to a detection circuit for detecting depression of a push-button switch on electronic equipment.
  • the headset includes a microphone and one or two speakers.
  • the headset further includes a push-button switch electrically connected across the microphone, and which may be used, for example, to “wake-up” the phone.
  • a detection circuit is needed to reliably detect closure of the push-button switch, which detection circuit must not interfere with the normal operation of the microphone 112 other than when the button is depressed.
  • the detection circuit should be able to remain active for long periods of time with very low power consumption.
  • the present invention provides a circuit for detecting a signal level on a node.
  • the circuit includes: (1) a switch coupled between a voltage source and the node, (2) a pulse generator coupled to the switch and configured to generate a pulse to control the switch and (3) a detection circuit coupled to the node and configured to detect a signal level at the node on closure of the switch.
  • the present invention provides a method of detecting a signal transition.
  • the method includes: (1) periodically switching a bias voltage to a node, (2) monitoring the node and (3) detecting a change in the state of the node on switching of the bias voltage.
  • the present invention provides a mobile telephone device incorporating the circuit or the method.
  • the mobile telephone device otherwise may be of any conventional or later-developed kind or origin.
  • FIG. 1 illustrates a schematic diagram of a prior art technique for detecting the state of a switch
  • FIG. 2 illustrates a schematic diagram of one embodiment of a detection circuit constructed according to the principles of the present invention.
  • FIG. 3 illustrates a schematic diagram of another embodiment of a detection circuit constructed according to the principles of the present invention.
  • the present invention provides a circuit for detecting a signal transition.
  • the circuit includes: a switch connected between a bias voltage and a node, a pulse generator for generating a pulse to control the switch, and a detection circuit having a connection to the node, wherein the detection circuit is adapted to detect a signal level at the node on closure of the switch.
  • the signal level may be a voltage level, a current level or a resistance level.
  • the detection circuit may be one or more of a voltage detection circuit, a current detection circuit and a resistance detection circuit.
  • the detection circuit has an input connected to the node.
  • a sensor configured to sense the current flowing into or out of the node is provided.
  • the circuit may further comprise a further switch connected between the node and a ground potential.
  • the detection circuit is adapted to detect a level at the node determined by the state of the further switch.
  • the pulse generator may further control the detection circuit.
  • the pulse generator may open and close the switch. In such case, the detection circuit is enabled when the switch is closed.
  • the detection circuit may be adapted to detect a signal at the node responsive to a stable signal at the node on a series of successive switch closures.
  • the detection circuit may be adapted to compare a current signal level at the node to a previous signal level to detect a transition at the node. The transition may be responsive to closure of a further switch connected between the node and a ground potential.
  • a further switch may be connected between a further bias voltage and the node.
  • the further switch may be a control switch for the device.
  • the control switch may be an on-off switch for the device.
  • the switch and the further switch may be controlled such that when one is closed the other is open. When the further switch is closed the switch may be disabled, and when the further switch is open the switch is enabled.
  • the circuit may further comprise a still further switch connected between the node and the ground potential.
  • the detection circuit is adapted to detect a signal level at the node determined by the state of the still further switch.
  • the further switch may be a control switch of the device, and the detection circuit is adapted to detect the state of the still further switch, the further switch being closed to provide a bias voltage to the detection circuit when the control switch is open.
  • the device may be a headset, and the further switch may be a push-button of said headset.
  • a mobile telephone device may incorporate a detection circuit as defined.
  • a headset of an electronic device may incorporate a detection circuit as defined.
  • the present invention provides a method of detecting a signal transition.
  • the method may include: periodically switching a bias voltage to a node, monitoring the node and detecting a change in the state of the node on switching of the bias voltage.
  • the method may further comprise selectively connecting the node to a ground potential, in which case, the detecting involves detecting a signal level at the node determined by the state of selective connection.
  • the detection circuit may detect a signal at the node responsive to a stable signal at the node on a series of successive switch closures.
  • the method may include comparing a current signal level at the node to a previous signal level to detect a transition at the node.
  • the transition may be detected responsive to closure of a further switch connected between the node and a ground potential.
  • the further switch may be closed disabling the switch, or the further switch may be opened enabling the switch.
  • the method may further include connecting a still further switch between the node and the ground potential, the detecting a signal level at the node being determined by the state of the still further switch.
  • the method may further include detecting the state of the still further switch, the further switch being closed to provide a bias voltage to the detection circuit when the control switch is open.
  • the present invention provides a circuit for detecting a signal transition.
  • the circuit may include: a switch connected between a first bias voltage and an output node, a switch connected between the output node and ground, a third switch connected between a second bias voltage and the output node, a detection circuit connected to the output node for detecting a state thereof determined by the state of the switch and a pulse generator for generating a pulse to control the third switch.
  • the third switch is periodically closed to allow detection by the detection circuit of the state of the node.
  • the control of the third switch is advantageously enabled when the switch is open.
  • the switch being open represents that a device to which the detection circuit is connected is switched off.
  • the detection circuit is advantageously switched on and off in synchronization with the third switch.
  • the switch may be connected across a microphone.
  • the switch may be connected to the output node via an R-C circuit.
  • the switch may be of the normally-open, push-button type.
  • the present invention provides a circuit for detecting a signal transition including a control switch for connecting a first bias voltage to an output node and a detection switch for connecting a second bias voltage to the node.
  • the detection switch enables detecting of the state of a further switch connected between the node and a ground potential.
  • the present invention is described herein by way of reference to particular examples, and particularly by way of reference to the use of a detection circuit in a headset which may be used in conjunction with a mobile telephone. It will be understood, however, that the present invention is not limited to such specific applications, and the detection circuit of the present invention, and embodiments thereof, may have wider applicability.
  • FIG. 1 shows a microphone circuit includes a microphone on-off switch SW 1 120 having one terminal connected to the bias supply voltage VBIAS 1 122 .
  • the other terminal of the microphone on-off switch SW 1 120 is connected to one terminal of a resistor R 1 116 .
  • a capacitor C 1 118 and a further resistor R 2 114 have terminals thereof connected commonly with the other terminal of the resistor R 1 116 at a common node 124 .
  • the other terminal of the capacitor C 1 118 is connected to a ground 110
  • the other terminal of the resistor R 2 114 is connected to a line or node 126 .
  • a microphone 112 is connected between the line 126 and the ground connection 110 .
  • a switch SW 2 108 is connected between the line 126 and the ground connection 110 .
  • the line 126 is connected to a first terminal of a capacitor C 2 106 , which has a second terminal connected to the input of an audio preamplifier 104 that generates an output signal on a line 130 .
  • the line 126 additionally forms an input to a detection circuit 102 which produces an output on a line 128 .
  • the illustrated embodiment of the microphone on-off switch SW 1 120 serves as a push-button on-off switch for the microphone 112 .
  • the control of the microphone on-off switch SW 1 120 is outside the scope of the present invention, but one skilled in the art will appreciate that the control of the microphone on-off switch SW 1 120 may be via, for example, a digital signal processor (DSP).
  • DSP digital signal processor
  • the microphone on-off switch SW 1 120 is closed and the microphone 112 is on.
  • the bias supply voltage VBIAS 1 122 typically provides a current of 0.5 mA or more, such that the line 126 , which may be considered an output node of the circuit of FIG. 1 and is further labeled MOUT in FIG. 1 , has a DC level midway between the bias supply voltage VBIAS 1 122 and the ground 110 .
  • the switch SW 2 108 (which, in the illustrated embodiment, is of the normally-open push-button type) is depressed, the node MOUT is connected to the ground 110 by a low resistance path, and the DC voltage at the node MOUT drops to close to the potential of the ground 110 .
  • a simple comparator may be used to detect the closure of the switch SW 2 108 connected across the microphone 112 .
  • the detection circuit 102 may thus simply be implemented as a comparator, to detect closure of the switch SW 2 108 .
  • the output of the detection circuit 102 on the line 128 generates a signal which may switch a device to which the headset is connected on or off in dependence on its initial state prior to depression of the switch SW 2 108 .
  • the device to which the headset is connected may be a mobile telephone.
  • the audio preamplifier 104 is an amplifier for signals detected by the microphone 112 .
  • the output of the audio preamplifier 104 on the output line 130 is thus connected to, for example, a transmit channel of a mobile telephone, or a recording channel of an audio recorder.
  • the circuitry to which the output line 130 of the audio preamplifier 104 is connected is not necessarily provided in the headset itself, but may be provided in a device to which the headset is connected, either wirelessly or wired. Indeed the preamplifier 104 itself may not be provided in the headset.
  • the depression of a button to close the switch SW 2 is detected to generate a signal on a line 128 , which signal is processed in accordance with a given implementation.
  • the specific use of the detecting the closure of the switch SW 2 108 is application specific.
  • the switch SW 2 108 is open, the node MOUT is at a mid-level, as discussed hereinabove, and the microphone circuitry is used in normal operation.
  • the closure of the switch SW 2 108 causes the node MOUT to go to a ground level, and this may be used as a control signal to initiate some action.
  • the closure of the switch SW 2 108 can only be detected when the switch SW 1 120 is closed.
  • the technique for detecting closure of the switch SW 2 108 works well, as it is necessary for the switch SW 1 120 to be closed during active operation to operate the microphone circuit.
  • the arrangement of FIG. 1 for detecting closure of the switch SW 2 108 works well enough.
  • the arrangement of FIG. 1 is far from acceptable. Requiring the microphone on-off switch SW 1 120 to remain closed solely to be able to detect closure of the switch SW 2 108 results in a significant power consumption and wastage. It would be advantageous for the button detection circuit, or switch state detection circuit, to be able to operate at a much lower power level for long periods of time.
  • a first problem associated with the arrangement of FIG. 1 is thus a power problem.
  • a second problem associated with the microphone 112 of FIG. 1 is a high intensity sound problem. Loud noises into the microphone 112 can cause large variations of the voltage at the node MOUT. These large variations may cause the detection circuit 102 to misinterpret the variation as closure of the switch SW 2 108 . It would be advantageous to avoid such erroneous detections.
  • FIG. 2 illustrates a schematic diagram of one embodiment of a detection circuit constructed according to the principles of the present invention.
  • an improved detection circuit in accordance with the present invention is applied to the microphone circuit arrangement of FIG. 1 which overcomes at least one of the prior art disadvantages.
  • like reference numerals are used to denote elements corresponding to elements shown in FIG. 1 .
  • the circuit of FIG. 2 is modified to include a switch SW 3 306 , having one terminal connected to a second bias voltage VBIAS 2 304 and another terminal connected to the node MOUT.
  • a clock/pulse generator 302 is further provided, generating a control signal on line 312 which provides a control to the switch SW 3 306 on a line 308 and a control to the detection circuit 102 on a line 310 .
  • the detection circuit can operate independently of the switch SW 1 .
  • the microphone on-off switch SW 1 120 may be left open, thus achieving a power saving.
  • the switch SW 3 306 is closed to provide the necessary bias voltage for detecting closure of the switch SW 2 108 .
  • the second bias voltage VBIAS 2 304 should be provided with some form of internal resistance. Simply by providing the switch SW 3 306 on its own, some power saving is achieved, but a significant power saving over the arrangement of FIG. 1 with the microphone on-off switch SW 1 120 closed is not achieved.
  • the clock/pulse generator 302 is preferably provided to pulse the switch SW 3 306 on and off, such that the second bias voltage VBIAS 2 304 is only intermittently applied.
  • C 1 118 limits the effective advantage of pulsing SW 1 , it should be noted that the R 1 -C 1 arrangement is necessary to filter any noise which may be present on the bias supply voltage VBIAS 1 122 and therefore removing or changing the value of C 1 118 is not an option.
  • the second bias voltage VBIAS 2 304 does not have to be filtered for noise, since it simply provides a bias voltage for the detection circuit, and therefore does not suffer this drawback.
  • the clock/pulse generator 302 operates to periodically close the switch SW 3 306 and switch on the detection circuit 102 , to detect whether the switch SW 2 108 is closed.
  • a DSP (not shown), which may control the clock/pulse generator 302 , ensures that the microphone on-off switch SW 1 120 and the switch SW 3 306 are not closed simultaneously.
  • the microphone on-off switch SW 1 120 is closed, and the switch SW 3 306 is not needed to detect closure of the switch SW 2 108 and is preferably disabled.
  • the microphone on-off switch SW 1 120 is opened and the switch SW 3 306 is periodically switched, to provide a low-power technique for detecting closure of the switch SW 2 108 .
  • the technique according to the present invention uses an electronically switched bias supply and detection circuit, both connected to a node MOUT which transitions to indicate closure of a switch or change of a bias potential.
  • the bias supply and detection circuit may be switched on for as little as a few microseconds every several milliseconds, and still be able to reliably detect the state of the button switch.
  • the power consumed when the detection circuit is enabled is similar to the power consumed when the microphone 112 is in use, the average power consumption is much smaller because of the short duty cycle.
  • the exemplary operation advantageously employs a slow clock, typically in the range of 10-100 Hz, which determines how often the detection circuit is powered-up, and a delay cell or higher-frequency clock which determines the duration of each sample period.
  • the detection circuit arrangement of FIG. 2 may be further enhanced.
  • a second problem associated with the detection circuit of FIG. 1 is that the detection circuit may erroneously detect depression of the push-button, due to variations at the node MOUT.
  • logic may be provided to offer a higher immunity to noise and switch bounce. Such an arrangement may require that several consecutive samples of the state of the switch SW 2 108 must be consistent before a change in the state of the switch is propagated to the detection circuit output on the line 128 .
  • this enhancement ensures that the state of the node MOUT indicates a switch depression for a particular period of time before the detection circuit confirms such as a switch depression.
  • this further enhancement may be implemented in the arrangement of FIG. 1 , and is not limited to being implemented in conjunction with the specific detection circuit, using the switch SW 3 306 , of FIG. 2 .
  • the use of logic to ensure a consistent result over a number of pulses may be used. Even without pulsing, it may be determined whether the state of a node remains constant over a period from a start time to a stop time.
  • a further enhancement of the arrangement of FIG. 2 is to provide logic which generates an input to a microcontroller or a DSP to initiate an action in response to the change of state of the button switch.
  • the same detection circuit can be used in either of two operating modes.
  • a high-power operating mode the microphone 112 bias supply is switched on, i.e., the microphone on-off switch SW 1 120 is closed. This mode is most appropriate when the microphone 112 is in an active operation, so that the bias supply must be active.
  • the detection circuit using the switch SW 2 108 and detection circuit 102 is operable to detect closure of the switch SW 2 108 .
  • the microphone 112 bias supply is switched off, i.e., the microphone on-off switch SW 1 120 is open.
  • the detector logic provided by the switch SW 3 306 is enabled, and switched on and off to sample the state of the detection button.
  • the switch SW 2 108 and the detection circuit 102 are operable to detect closure of the detection button.
  • the same detection circuitry (the switch SW 2 108 and the detection circuit 102 ) is used regardless of the mode of operation of the microphone circuit.
  • the detection circuit operates in a similar manner to that shown in FIG. 1 .
  • the bias supply voltage VBIAS 1 122 need not be provided, and thus the additional circuitry illustrated in FIG. 2 is used.
  • the audio preamplifier 104 is provided with a differential input pair, each input being provided through a respective capacitor C 2 208 and C 3 210 .
  • First terminals of each capacitor C 2 208 and C 3 210 are thus connected to respective input of the amplifier 104 .
  • the other terminals of the capacitors C 2 and C 3 are connected to opposite terminals of the microphone 112 204 .
  • the connection point of the microphone 112 with the capacitor C 2 defines a first output node MOUT 1
  • the connection point of the microphone 112 with the capacitor C 3 defines a second output node MOUT 2 .
  • a resistor R 3 206 is connected between the second output node MOUT 2 and ground. In practice the resistor R 3 206 may be mounted with the microphone 112 .
  • the switch SW 2 202 being the push-button switch is connected in parallel across the microphone 112 204 and the resistor R 3 206 , having a first terminal connected to the first output node MOUT 1 and a second terminal connected to ground.
  • the switch SW 3 306 has its first terminal connected to the bias voltage VBIAS 2 304 as in FIG. 2 , and its second terminal connected to the first output node MOUT 1 .
  • the first output node MOUT 1 is further connected to the input of the detection circuit 102 .
  • the first output node MOUT 1 effectively corresponds to the output node MOUT of FIG. 2 .
  • FIG. 3 serves to illustrate that the principles of the present invention may be used in more than one microphone 112 arrangement.
  • the detection circuit may be implemented as a voltage comparator for detecting a voltage change, but other implementations are possible.
  • the detection circuit may be implemented as a current or resistance comparator. This would require an arrangement where the current could be sensed through the switch SW 3 306 (and/or the microphone on-off switch SW 1 120 ).
  • a modification to the described embodiments to allow for a current sensing arrangement will be within the scope of one skilled in the art.
  • the detection circuit is provided to detect a level or state, and preferably to thereby identify a change therein.
  • the principles of the detection circuit as described herein are not limited in their use to microphone circuits. The principles may be employed in any arrangement where it is necessary to detect a signal transition.
  • a further advantage of the detection circuit as described herein is that it may be used to distinguish one type of headset from another, when any of two or more types of headsets which have the same type of plug connector may be connected.
  • the detection circuit can distinguish a headset with a microphone and a monaural speaker from a headset with stereo speakers, because a speaker in a stereo headset generally provides a much lower resistance path to ground than does the microphone.
  • the present invention provides an advantageous and efficient method for detecting a headset button-press.
  • the detection circuit is compatible with normal operation of a microphone, but also provides for low-power operation when the microphone is not in use or is in a standby mode of operation.
  • the detection circuit may therefore be used, for example, to switch from inactive mode to active mode responsive to detecting the button-press depression.
  • the same detection circuit may also be advantageously used to distinguish among different types of headsets that may be plugged into a headset connector.
  • the present invention has been described herein by way of example embodiments relating to implementation in a headset for use with a mobile telephone device.
  • the present invention is not limited, however, in its applicability to mobile telephone devices or to headsets.
  • the present invention, and embodiments thereof, may be used in any suitable device where it is advantageous to detect transition of a signal.

Abstract

A circuit for, and method of, detecting a signal level on a node and a mobile telephone device incorporating the circuit or the method. In one embodiment, the circuit includes: (1) a switch coupled between a voltage source and the node, (2) a pulse generator coupled to the switch and configured to generate a pulse to control the switch and (3) a detection circuit coupled to the node and configured to detect a signal level at the node on closure of the switch.

Description

TECHNICAL FIELD OF THE INVENTION
The present invention relates to a detection circuit, and particularly but not exclusively to a detection circuit for detecting depression of a push-button switch on electronic equipment.
BACKGROUND OF THE INVENTION
Portable devices, such as mobile or cellular telephones, are often equipped with a headset. The headset includes a microphone and one or two speakers. The headset further includes a push-button switch electrically connected across the microphone, and which may be used, for example, to “wake-up” the phone. A detection circuit is needed to reliably detect closure of the push-button switch, which detection circuit must not interfere with the normal operation of the microphone 112 other than when the button is depressed.
It is also advantageous to provide such a detection circuit which does not unnecessarily consume power. Preferably the detection circuit should be able to remain active for long periods of time with very low power consumption.
Accordingly, what is needed in the art is a better way to detect the state of a switch. More specifically, what is needed in the art is a less power consumptive way to detect whether or not a push-button is depressed.
SUMMARY OF THE INVENTION
To address the above-discussed deficiencies of the prior art, the present invention provides a circuit for detecting a signal level on a node. In one embodiment, the circuit includes: (1) a switch coupled between a voltage source and the node, (2) a pulse generator coupled to the switch and configured to generate a pulse to control the switch and (3) a detection circuit coupled to the node and configured to detect a signal level at the node on closure of the switch.
In another aspect, the present invention provides a method of detecting a signal transition. In one aspect, the method includes: (1) periodically switching a bias voltage to a node, (2) monitoring the node and (3) detecting a change in the state of the node on switching of the bias voltage.
In yet other aspects, the present invention provides a mobile telephone device incorporating the circuit or the method. The mobile telephone device otherwise may be of any conventional or later-developed kind or origin.
The foregoing has outlined preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the present invention that follows. Additional features of the present invention will be described hereinafter that form the subject of the claims of the present invention. Those skilled in the art should appreciate that they can readily use the disclosed concept and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present invention.
BRIEF DESCRIPTION OF THE DRAWINGS
For a more complete understanding of the present invention, reference is now made to the following descriptions taken in conjunction with the accompanying drawing, in which:
FIG. 1 illustrates a schematic diagram of a prior art technique for detecting the state of a switch;
FIG. 2 illustrates a schematic diagram of one embodiment of a detection circuit constructed according to the principles of the present invention; and
FIG. 3 illustrates a schematic diagram of another embodiment of a detection circuit constructed according to the principles of the present invention.
DETAILED DESCRIPTION
Before describing the FIGUREs, some aspects and alternative embodiments for the detection circuit of the present invention will be discussed. In general, the present invention provides a circuit for detecting a signal transition. The circuit includes: a switch connected between a bias voltage and a node, a pulse generator for generating a pulse to control the switch, and a detection circuit having a connection to the node, wherein the detection circuit is adapted to detect a signal level at the node on closure of the switch. The signal level may be a voltage level, a current level or a resistance level. The detection circuit may be one or more of a voltage detection circuit, a current detection circuit and a resistance detection circuit. For detecting a voltage level, the detection circuit has an input connected to the node. For detecting a current level, a sensor configured to sense the current flowing into or out of the node is provided.
The circuit may further comprise a further switch connected between the node and a ground potential. In such case, the detection circuit is adapted to detect a level at the node determined by the state of the further switch.
The pulse generator may further control the detection circuit. The pulse generator may open and close the switch. In such case, the detection circuit is enabled when the switch is closed.
The detection circuit may be adapted to detect a signal at the node responsive to a stable signal at the node on a series of successive switch closures. The detection circuit may be adapted to compare a current signal level at the node to a previous signal level to detect a transition at the node. The transition may be responsive to closure of a further switch connected between the node and a ground potential.
A further switch may be connected between a further bias voltage and the node. The further switch may be a control switch for the device. The control switch may be an on-off switch for the device. The switch and the further switch may be controlled such that when one is closed the other is open. When the further switch is closed the switch may be disabled, and when the further switch is open the switch is enabled.
The circuit may further comprise a still further switch connected between the node and the ground potential. In such case, the detection circuit is adapted to detect a signal level at the node determined by the state of the still further switch. The further switch may be a control switch of the device, and the detection circuit is adapted to detect the state of the still further switch, the further switch being closed to provide a bias voltage to the detection circuit when the control switch is open.
The device may be a headset, and the further switch may be a push-button of said headset. A mobile telephone device may incorporate a detection circuit as defined. A headset of an electronic device may incorporate a detection circuit as defined.
In another aspect, the present invention provides a method of detecting a signal transition. The method may include: periodically switching a bias voltage to a node, monitoring the node and detecting a change in the state of the node on switching of the bias voltage.
The method may further comprise selectively connecting the node to a ground potential, in which case, the detecting involves detecting a signal level at the node determined by the state of selective connection.
The detection circuit may detect a signal at the node responsive to a stable signal at the node on a series of successive switch closures.
The method may include comparing a current signal level at the node to a previous signal level to detect a transition at the node. The transition may be detected responsive to closure of a further switch connected between the node and a ground potential. The further switch may be closed disabling the switch, or the further switch may be opened enabling the switch.
The method may further include connecting a still further switch between the node and the ground potential, the detecting a signal level at the node being determined by the state of the still further switch. The method may further include detecting the state of the still further switch, the further switch being closed to provide a bias voltage to the detection circuit when the control switch is open.
In one embodiment, the present invention provides a circuit for detecting a signal transition. The circuit may include: a switch connected between a first bias voltage and an output node, a switch connected between the output node and ground, a third switch connected between a second bias voltage and the output node, a detection circuit connected to the output node for detecting a state thereof determined by the state of the switch and a pulse generator for generating a pulse to control the third switch. The third switch is periodically closed to allow detection by the detection circuit of the state of the node. The control of the third switch is advantageously enabled when the switch is open. The switch being open represents that a device to which the detection circuit is connected is switched off. The detection circuit is advantageously switched on and off in synchronization with the third switch. The switch may be connected across a microphone. The switch may be connected to the output node via an R-C circuit. The switch may be of the normally-open, push-button type.
In an alternate embodiment, the present invention provides a circuit for detecting a signal transition including a control switch for connecting a first bias voltage to an output node and a detection switch for connecting a second bias voltage to the node. The detection switch enables detecting of the state of a further switch connected between the node and a ground potential.
The present invention is described herein by way of reference to particular examples, and particularly by way of reference to the use of a detection circuit in a headset which may be used in conjunction with a mobile telephone. It will be understood, however, that the present invention is not limited to such specific applications, and the detection circuit of the present invention, and embodiments thereof, may have wider applicability.
Having described various embodiments of the present invention in general, reference will now be made to the FIGUREs. Accordingly, referring initially to FIG. 1, illustrated is a schematic diagram of a prior art technique for detecting the state of a switch. FIG. 1 shows a microphone circuit includes a microphone on-off switch SW1 120 having one terminal connected to the bias supply voltage VBIAS1 122. The other terminal of the microphone on-off switch SW1 120 is connected to one terminal of a resistor R1 116. A capacitor C1 118 and a further resistor R2 114 have terminals thereof connected commonly with the other terminal of the resistor R1 116 at a common node 124. The other terminal of the capacitor C1 118 is connected to a ground 110, and the other terminal of the resistor R2 114 is connected to a line or node 126.
A microphone 112 is connected between the line 126 and the ground connection 110. A switch SW2 108 is connected between the line 126 and the ground connection 110. The line 126 is connected to a first terminal of a capacitor C2 106, which has a second terminal connected to the input of an audio preamplifier 104 that generates an output signal on a line 130. The line 126 additionally forms an input to a detection circuit 102 which produces an output on a line 128.
The illustrated embodiment of the microphone on-off switch SW1 120 serves as a push-button on-off switch for the microphone 112. The control of the microphone on-off switch SW1 120 is outside the scope of the present invention, but one skilled in the art will appreciate that the control of the microphone on-off switch SW1 120 may be via, for example, a digital signal processor (DSP). In normal operation, the microphone on-off switch SW1 120 is closed and the microphone 112 is on. The bias supply voltage VBIAS1 122 typically provides a current of 0.5 mA or more, such that the line 126, which may be considered an output node of the circuit of FIG. 1 and is further labeled MOUT in FIG. 1, has a DC level midway between the bias supply voltage VBIAS1 122 and the ground 110.
When the switch SW2 108 (which, in the illustrated embodiment, is of the normally-open push-button type) is depressed, the node MOUT is connected to the ground 110 by a low resistance path, and the DC voltage at the node MOUT drops to close to the potential of the ground 110.
With the microphone on-off switch SW1 120 closed, a simple comparator may be used to detect the closure of the switch SW2 108 connected across the microphone 112. The detection circuit 102 may thus simply be implemented as a comparator, to detect closure of the switch SW2 108.
The output of the detection circuit 102 on the line 128 generates a signal which may switch a device to which the headset is connected on or off in dependence on its initial state prior to depression of the switch SW2 108. The device to which the headset is connected may be a mobile telephone.
The audio preamplifier 104 is an amplifier for signals detected by the microphone 112. The output of the audio preamplifier 104 on the output line 130 is thus connected to, for example, a transmit channel of a mobile telephone, or a recording channel of an audio recorder. The circuitry to which the output line 130 of the audio preamplifier 104 is connected is not necessarily provided in the headset itself, but may be provided in a device to which the headset is connected, either wirelessly or wired. Indeed the preamplifier 104 itself may not be provided in the headset.
In general the depression of a button to close the switch SW2 is detected to generate a signal on a line 128, which signal is processed in accordance with a given implementation.
The specific use of the detecting the closure of the switch SW2 108 is application specific. When the switch SW2 108 is open, the node MOUT is at a mid-level, as discussed hereinabove, and the microphone circuitry is used in normal operation. The closure of the switch SW2 108 causes the node MOUT to go to a ground level, and this may be used as a control signal to initiate some action.
It will be understood from reference to FIG. 1 that the closure of the switch SW2 108 can only be detected when the switch SW1 120 is closed. When the microphone circuit is in active operation, and being used, the technique for detecting closure of the switch SW2 108 works well, as it is necessary for the switch SW1 120 to be closed during active operation to operate the microphone circuit. Thus in active operation of the microphone circuit, the arrangement of FIG. 1 for detecting closure of the switch SW2 108 works well enough. However in “standby” operation, where the microphone 112 is not active, the arrangement of FIG. 1 is far from acceptable. Requiring the microphone on-off switch SW1 120 to remain closed solely to be able to detect closure of the switch SW2 108 results in a significant power consumption and wastage. It would be advantageous for the button detection circuit, or switch state detection circuit, to be able to operate at a much lower power level for long periods of time. A first problem associated with the arrangement of FIG. 1 is thus a power problem.
A second problem associated with the microphone 112 of FIG. 1 is a high intensity sound problem. Loud noises into the microphone 112 can cause large variations of the voltage at the node MOUT. These large variations may cause the detection circuit 102 to misinterpret the variation as closure of the switch SW2 108. It would be advantageous to avoid such erroneous detections.
To provide a solution to the power problem, it would be possible to cycle the bias supply voltage VBIAS1 122 and the detection circuit 102 on and off on a sporadic basis, so as to sporadically (and perhaps periodically) check whether the switch SW2 108 is depressed. However, because the time constant T1 of the R—C filter formed by the resistor R1 116 and capacitor C1 118 is advantageously comparable to the preferred sampling interval, not much power can be saved by cycling the bias supply voltage VBIAS1 122 in this way.
FIG. 2 illustrates a schematic diagram of one embodiment of a detection circuit constructed according to the principles of the present invention. With reference to FIG. 2, an improved detection circuit in accordance with the present invention is applied to the microphone circuit arrangement of FIG. 1 which overcomes at least one of the prior art disadvantages. In FIG. 2, like reference numerals are used to denote elements corresponding to elements shown in FIG. 1.
The circuit of FIG. 2 is modified to include a switch SW3 306, having one terminal connected to a second bias voltage VBIAS2 304 and another terminal connected to the node MOUT. A clock/pulse generator 302 is further provided, generating a control signal on line 312 which provides a control to the switch SW3 306 on a line 308 and a control to the detection circuit 102 on a line 310.
By the provision of the switch SW3 306, the detection circuit can operate independently of the switch SW1. Thus when the microphone 112 is inactive, the microphone on-off switch SW1 120 may be left open, thus achieving a power saving. The switch SW3 306 is closed to provide the necessary bias voltage for detecting closure of the switch SW2 108. The second bias voltage VBIAS2 304 should be provided with some form of internal resistance. Simply by providing the switch SW3 306 on its own, some power saving is achieved, but a significant power saving over the arrangement of FIG. 1 with the microphone on-off switch SW1 120 closed is not achieved.
Thus, for a significant power-saving, the clock/pulse generator 302 is preferably provided to pulse the switch SW3 306 on and off, such that the second bias voltage VBIAS2 304 is only intermittently applied.
It should be noted that the advantages obtained by providing the switch SW3 306 and pulsing the switch SW3 306 would not be achieved by simply pulsing the microphone on-off switch SW1 120. A significant amount of power is required to charge the capacitor C1 118, and thus although pulsing the microphone on-off switch SW1 120 would provide some power saving over having the microphone on-off switch SW1 120 permanently closed, a significant power saving is not achieved. Nevertheless, simply modifying the arrangement of FIG. 1 to pulse the microphone on-off switch SW1 120 may offer some advantage which may be useful in some applications.
Although the presence of C1 118 limits the effective advantage of pulsing SW1, it should be noted that the R1-C1 arrangement is necessary to filter any noise which may be present on the bias supply voltage VBIAS1 122 and therefore removing or changing the value of C1 118 is not an option. The second bias voltage VBIAS2 304 does not have to be filtered for noise, since it simply provides a bias voltage for the detection circuit, and therefore does not suffer this drawback.
Thus in operation, the clock/pulse generator 302 operates to periodically close the switch SW3 306 and switch on the detection circuit 102, to detect whether the switch SW2 108 is closed.
Preferably a DSP (not shown), which may control the clock/pulse generator 302, ensures that the microphone on-off switch SW1 120 and the switch SW3 306 are not closed simultaneously. When the microphone 112 is in an active mode of operation, the microphone on-off switch SW1 120 is closed, and the switch SW3 306 is not needed to detect closure of the switch SW2 108 and is preferably disabled. When the microphone 112 is in inactive or standby mode, the microphone on-off switch SW1 120 is opened and the switch SW3 306 is periodically switched, to provide a low-power technique for detecting closure of the switch SW2 108.
Thus the technique according to the present invention uses an electronically switched bias supply and detection circuit, both connected to a node MOUT which transitions to indicate closure of a switch or change of a bias potential. The bias supply and detection circuit may be switched on for as little as a few microseconds every several milliseconds, and still be able to reliably detect the state of the button switch. Although the power consumed when the detection circuit is enabled is similar to the power consumed when the microphone 112 is in use, the average power consumption is much smaller because of the short duty cycle.
The exemplary operation advantageously employs a slow clock, typically in the range of 10-100 Hz, which determines how often the detection circuit is powered-up, and a delay cell or higher-frequency clock which determines the duration of each sample period.
The detection circuit arrangement of FIG. 2 may be further enhanced. As discussed hereinabove, a second problem associated with the detection circuit of FIG. 1 is that the detection circuit may erroneously detect depression of the push-button, due to variations at the node MOUT. In accordance with a further enhancement to the detection circuit arrangement of FIG. 2, logic may be provided to offer a higher immunity to noise and switch bounce. Such an arrangement may require that several consecutive samples of the state of the switch SW2 108 must be consistent before a change in the state of the switch is propagated to the detection circuit output on the line 128.
Thus, this enhancement ensures that the state of the node MOUT indicates a switch depression for a particular period of time before the detection circuit confirms such as a switch depression. It should be noted that this further enhancement may be implemented in the arrangement of FIG. 1, and is not limited to being implemented in conjunction with the specific detection circuit, using the switch SW3 306, of FIG. 2. For example in an arrangement where it was found to be advantageous simply to pulse the switch SW3 306 of FIG. 1, then the use of logic to ensure a consistent result over a number of pulses may be used. Even without pulsing, it may be determined whether the state of a node remains constant over a period from a start time to a stop time.
A further enhancement of the arrangement of FIG. 2 is to provide logic which generates an input to a microcontroller or a DSP to initiate an action in response to the change of state of the button switch.
The same detection circuit, as shown in FIG. 2, can be used in either of two operating modes. In a high-power operating mode, the microphone 112 bias supply is switched on, i.e., the microphone on-off switch SW1 120 is closed. This mode is most appropriate when the microphone 112 is in an active operation, so that the bias supply must be active. In this high-power mode of operation, the detection circuit using the switch SW2 108 and detection circuit 102 is operable to detect closure of the switch SW2 108.
In a low-power mode of operation, the microphone 112 bias supply is switched off, i.e., the microphone on-off switch SW1 120 is open. However in such mode of operation the detector logic provided by the switch SW3 306 is enabled, and switched on and off to sample the state of the detection button. Thus the switch SW2 108 and the detection circuit 102 are operable to detect closure of the detection button.
Thus the same detection circuitry (the switch SW2 108 and the detection circuit 102) is used regardless of the mode of operation of the microphone circuit. When the microphone circuit is active the detection circuit operates in a similar manner to that shown in FIG. 1. When the microphone circuit is inactive, or in standby mode, the bias supply voltage VBIAS1 122 need not be provided, and thus the additional circuitry illustrated in FIG. 2 is used.
For completeness, it is pointed out that all components other than the microphone 112, the switch SW2 108, and possibly the resistor R2 114 would preferably be mounted on the circuit board of a telephone or other device. This may include discrete components, one or more integrated circuit chips or a combination of both.
Turning now to FIG. 3, illustrated is a schematic diagram of another embodiment of a detection circuit constructed according to the principles of the present invention. FIG. 3 shows a microphone circuit which is implemented as a differential amplifier, as opposed to the single input amplifier of FIG. 2. Like reference numerals are used in FIG. 3 to denote elements which are the same as those shown in either of FIG. 1 or 2.
It can be seen that the audio preamplifier 104 is provided with a differential input pair, each input being provided through a respective capacitor C2 208 and C3 210. First terminals of each capacitor C2 208 and C3 210 are thus connected to respective input of the amplifier 104. The other terminals of the capacitors C2 and C3 are connected to opposite terminals of the microphone 112 204. The connection point of the microphone 112 with the capacitor C2 defines a first output node MOUT1, and the connection point of the microphone 112 with the capacitor C3 defines a second output node MOUT2. A resistor R3 206 is connected between the second output node MOUT2 and ground. In practice the resistor R3 206 may be mounted with the microphone 112. The switch SW2 202 being the push-button switch is connected in parallel across the microphone 112 204 and the resistor R3 206, having a first terminal connected to the first output node MOUT1 and a second terminal connected to ground. The switch SW3 306 has its first terminal connected to the bias voltage VBIAS2 304 as in FIG. 2, and its second terminal connected to the first output node MOUT1. The first output node MOUT1 is further connected to the input of the detection circuit 102. Thus the first output node MOUT1 effectively corresponds to the output node MOUT of FIG. 2.
The operation of a differential microphone 112 as shown in FIG. 3, as opposed to the single input microphone 112 of FIG. 2, will be understood by one skilled in the art, and is not described in detail herein. FIG. 3 serves to illustrate that the principles of the present invention may be used in more than one microphone 112 arrangement.
The detection circuit may be implemented as a voltage comparator for detecting a voltage change, but other implementations are possible. In an alternative, for example, the detection circuit may be implemented as a current or resistance comparator. This would require an arrangement where the current could be sensed through the switch SW3 306 (and/or the microphone on-off switch SW1 120). A modification to the described embodiments to allow for a current sensing arrangement will be within the scope of one skilled in the art. In general, the detection circuit is provided to detect a level or state, and preferably to thereby identify a change therein.
Furthermore the principles of the detection circuit as described herein are not limited in their use to microphone circuits. The principles may be employed in any arrangement where it is necessary to detect a signal transition.
A further advantage of the detection circuit as described herein is that it may be used to distinguish one type of headset from another, when any of two or more types of headsets which have the same type of plug connector may be connected. For example, the detection circuit can distinguish a headset with a microphone and a monaural speaker from a headset with stereo speakers, because a speaker in a stereo headset generally provides a much lower resistance path to ground than does the microphone.
Thus, in alternative embodiments, the present invention provides an advantageous and efficient method for detecting a headset button-press. The detection circuit is compatible with normal operation of a microphone, but also provides for low-power operation when the microphone is not in use or is in a standby mode of operation. The detection circuit may therefore be used, for example, to switch from inactive mode to active mode responsive to detecting the button-press depression. The same detection circuit may also be advantageously used to distinguish among different types of headsets that may be plugged into a headset connector.
The present invention has been described herein by way of example embodiments relating to implementation in a headset for use with a mobile telephone device. The present invention is not limited, however, in its applicability to mobile telephone devices or to headsets. The present invention, and embodiments thereof, may be used in any suitable device where it is advantageous to detect transition of a signal.
Although the present invention has been described in detail, those skilled in the art should understand that they can make various changes, substitutions and alterations herein without departing from the spirit and scope of the present invention in its broadest form.

Claims (24)

1. A circuit for detecting a signal level on a node, comprising:
a switch coupled between a voltage source and said node;
a detection circuit coupled to said node and configured to detect a signal level at said node only on closure of said switch; and
a pulse generator coupled to said switch and said detection circuit and configured to generate a single pulse in a cycle that controls both the detection circuit and the switch such that the single pulse closes said switch and enables said detection circuit at the same time, wherein said switch is open and said detection circuit is disabled when said single pulse is not generated.
2. The circuit as recited in claim 1 further comprising a further switch connected between said node and a ground potential, said detection circuit being configured to detect a level at said node determined by said state of said further switch.
3. The circuit as recited in claim 1 wherein said detection circuit is configured to detect a signal at said node responsive to a stable signal at said node on a series of successive switch closures.
4. The circuit as recited in claim 1 wherein said detection circuit is configured to compare a current signal level at said node to a previous signal level to detect a transition at said node.
5. The circuit as recited in claim 4 wherein said transition is responsive to closure of a further switch connected between said node and a ground potential.
6. The circuit as recited in claim 1 further comprising a further switch connected between a further bias voltage and said node.
7. The circuit as recited in claim 6 wherein said further switch is a control switch for said device.
8. The circuit as recited in claim 6 wherein said switch and said further switch are controlled such that when one is closed said other is open.
9. The circuit as recited in claim 6 wherein said switch is disabled when said further switch is closed, and said switch is enabled when said further switch is open.
10. The circuit as recited in claim 6 further comprising a still further switch connected between said node and said ground potential, said detection circuit being configured to detect a signal level at said node determined by said state of said still further switch.
11. The circuit as recited in claim 10 wherein said further switch is a control switch of said device, and said detection circuit is configured to detect said state of said still further switch, said further switch being closed to provide a bias voltage to said detection circuit when said control switch is open.
12. The circuit as recited in claim 11 wherein said device is a headset and said further switch is a push-button of said headset.
13. The circuit as recited in claim 1 wherein said circuit is contained within a mobile telephone device.
14. The circuit as recited in claim 1 wherein said circuit is contained within a headset of an electronic device.
15. A method of detecting a signal transition at a node, comprising:
generating a single pulse in a cycle with a pulse generator, said single pulse:
closing a switch, said switch periodically switching a bias voltage to said node, and;
enabling a detector, said detector detecting a change in said state of said node only on closure of said switch, wherein said switch is open and said detector is disabled when said single pulse is not generated.
16. The method as recited in claim 15 further comprising selectively connecting said node to a ground potential, said detecting comprising detecting a signal level at said node determined by said state of selective connection.
17. The method as recited in claim 15 wherein said detecting comprises detecting a signal at said node responsive to a stable signal at said node on a series of successive switch closures.
18. The method as recited in claim 15 further comprising comparing a current signal level at said node to a previous signal level to detect a transition at said node.
19. The method as recited in claim 18 wherein said transition is detected responsive to closure of a further switch connected between said node and a ground potential.
20. The method as recited in claim 15 further comprising providing a further switch between a further bias voltage and said node.
21. The method as recited in claim 20 further comprising controlling said switch and said further switch such that when one is closed said other is open.
22. The method as recited in claim 20 further comprising:
disabling said switch when said further switch is closed; and
enabling said switch when said further switch is open.
23. The method as recited in claim 20 further comprising connecting a still further switch between said node and said ground potential, said detecting a signal level at said node being determined by said state of said still further switch.
24. The method as recited in claim 23 further comprising detecting said state of said still further switch, said further switch being closed to provide a bias voltage to said detection circuit when said control switch is open.
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080297175A1 (en) * 2007-05-31 2008-12-04 Wu Yingchao Apparatus and method for measuring capacitance to ground of conductor
US20150023520A1 (en) * 2008-05-30 2015-01-22 Apple Inc. Headset microphone type detect
US10198094B1 (en) 2017-08-02 2019-02-05 Microsoft Technology Licensing, Llc Active stylus
US10368163B2 (en) 2014-10-03 2019-07-30 Qualcomm Incorporated Headset power supply and input voltage recognition
US11281314B2 (en) * 2019-12-02 2022-03-22 Semiconductor Components Industries, Llc Methods and apparatus for variable capacitance detection

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8077878B2 (en) * 2006-07-26 2011-12-13 Qualcomm Incorporated Low-power on-chip headset switch detection
US8736115B2 (en) * 2010-08-31 2014-05-27 Apple Inc. Buttons with modulated bias voltages
US9329237B2 (en) * 2014-01-10 2016-05-03 Freescale Semiconductor, Inc. Switch detection device and method of use
US11205338B2 (en) * 2019-12-19 2021-12-21 Micron Technology, Inc. Extracting the resistor-capacitor time constant of an electronic circuit line
US11074805B2 (en) * 2019-12-19 2021-07-27 Micron Technology, Inc. Resistor-capacitor sensor circuit

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4498089A (en) * 1982-07-16 1985-02-05 Ing. C. Olivetti & C., S.P.A. Control system for ink jet printing element
US5629921A (en) * 1994-01-10 1997-05-13 Eastman Kodak Company Level detector for detecting a voltage level of a signal
US6374126B1 (en) * 1999-11-10 2002-04-16 Ericsson Inc. Hands-free headset with stowable stereo earpiece
US6466036B1 (en) * 1998-11-25 2002-10-15 Harald Philipp Charge transfer capacitance measurement circuit
US6700382B2 (en) * 2001-04-11 2004-03-02 Siemens Aktiengesellschaft Method for detecting a switched state of a switch
US20040066208A1 (en) * 2002-10-07 2004-04-08 Liu Jonathan H. Method and apparatus for detection and quantification of on-die voltage noise in microcircuits
US20040189330A1 (en) * 2003-01-09 2004-09-30 Ulrich Herb Circuit and method for detecting insulation faults
US20050249354A1 (en) * 2004-05-10 2005-11-10 Joseph Patino Method and system for operating accessory controls
US6969978B2 (en) * 2003-03-17 2005-11-29 Rf Micro Devices, Inc. DC-DC converter with reduced electromagnetic interference
US20060103435A1 (en) * 2004-11-18 2006-05-18 Taiwan Semiconductor Manufacturing Co., Ltd. Single gate oxide I/O buffer with improved under-drive feature

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4498089A (en) * 1982-07-16 1985-02-05 Ing. C. Olivetti & C., S.P.A. Control system for ink jet printing element
US5629921A (en) * 1994-01-10 1997-05-13 Eastman Kodak Company Level detector for detecting a voltage level of a signal
US6466036B1 (en) * 1998-11-25 2002-10-15 Harald Philipp Charge transfer capacitance measurement circuit
US6374126B1 (en) * 1999-11-10 2002-04-16 Ericsson Inc. Hands-free headset with stowable stereo earpiece
US6700382B2 (en) * 2001-04-11 2004-03-02 Siemens Aktiengesellschaft Method for detecting a switched state of a switch
US20040066208A1 (en) * 2002-10-07 2004-04-08 Liu Jonathan H. Method and apparatus for detection and quantification of on-die voltage noise in microcircuits
US20040189330A1 (en) * 2003-01-09 2004-09-30 Ulrich Herb Circuit and method for detecting insulation faults
US6969978B2 (en) * 2003-03-17 2005-11-29 Rf Micro Devices, Inc. DC-DC converter with reduced electromagnetic interference
US20050249354A1 (en) * 2004-05-10 2005-11-10 Joseph Patino Method and system for operating accessory controls
US20060103435A1 (en) * 2004-11-18 2006-05-18 Taiwan Semiconductor Manufacturing Co., Ltd. Single gate oxide I/O buffer with improved under-drive feature

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080297175A1 (en) * 2007-05-31 2008-12-04 Wu Yingchao Apparatus and method for measuring capacitance to ground of conductor
US20150023520A1 (en) * 2008-05-30 2015-01-22 Apple Inc. Headset microphone type detect
US10165347B2 (en) * 2008-05-30 2018-12-25 Apple Inc. Headset microphone type detect
US10368163B2 (en) 2014-10-03 2019-07-30 Qualcomm Incorporated Headset power supply and input voltage recognition
US10198094B1 (en) 2017-08-02 2019-02-05 Microsoft Technology Licensing, Llc Active stylus
US11281314B2 (en) * 2019-12-02 2022-03-22 Semiconductor Components Industries, Llc Methods and apparatus for variable capacitance detection

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